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– 12KB of Shared RAM With Single-ErrorDetection （Parity）
– Three 120-Byte Register Banks Accessible byEach PRU
– Interrupt Controller （INTC） for Handling SystemInput Events
– Local Interconnect Bus for Connecting Internaland External Masters to the Resources Insidethe PRU-ICSS
– Peripherals Inside the PRU-ICSS：
– One UART Port With Flow Control Pins，Supports up to 12 Mbps
– One Enhanced Capture （eCAP） Module
– Two MII Ethernet Ports that Support IndustrialEthernet， such as EtherCAT
– One MDIO Port
• Power， Reset， and Clock Management （PRCM）Module
– Controls the Entry and Exit of Stand-By andDeep-Sleep Modes
– Responsible for Sleep Sequencing， PowerDomain Switch-Off Sequencing， Wake-Up Sequencing， and Power Domain Switch-OnSequencing
– Clocks
– Integrated 15- to 35-MHz High-FrequencyOscillator Used to Generate a Reference
Clock for Various System and PeripheralClocks
– Supports Individual Clock Enable and DisableControl for Subsystems and Peripherals toFacilitate Reduced Power Consumption
– Five ADPLLs to Generate System Clocks（MPU Subsystem， DDR Interface， USB and Peripherals ［MMC and SD， UART， SPI， I2C］，L3， L4， Ethernet， GFX ［SGX530］， LCD Pixel Clock）
– Power
– Two Nonswitchable Power Domains （Real-Time Clock ［RTC］， Wake-Up Logic
［WAKEUP］）
– Three Switchable Power Domains （MPUSubsystem ［MPU］， SGX530 ［GFX］，
Peripherals and Infrastructure ［PER］）
– Implements SmartReflex™ Class 2B for CoreVoltage Scaling Based On Die Temperature，Process Variation， and Performance（Adaptive Voltage Scaling ［AVS］）
– Dynamic Voltage Frequency Scaling （DVFS）
• Real-Time Clock （RTC）
– Real-Time Date （Day-Month-Year-Day of Week）and Time （Hours-Minutes-Seconds） Information
– Internal 32.768-kHz Oscillator， RTC Logic and1.1-V Internal LDO
– Independent Power-on-Reset（RTC_PWRONRSTn） Input – Dedicated Input Pin （EXT_WAKEUP） forExternal Wake Events (责任编辑：admin) |